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Introduction
An extensive lineup of memory products is provided by NEC Electronics, which focuses on the key concepts of high capacity, high speed, and miniaturization.
The most advanced technology in the industry is used by NEC Electronics to develop and supply the products needed when users need them.
Static RAM (SRAM)
Both low-power-consumption and high-speed-access products with various capacities to match the requirements of the market are featured in NEC Electronics' SRAM lineup features. Four different types of the high-speed-access product series includes corresponding to various interfaces on the memory controller side.
Low Power SRAM
Low power consumption in Low Power SRAM makes it the ideal memory for mobile devices such as cellular phones and PDAs. It is ideal for battery backup as it has minimal standby current.
Features
- Low current consumption due to employment of full CMOS cells (standby current in 8 Mbits product: 15 µA)
- Product with low power supply voltage (1.8 VCC) also available
- Operating temperature ideal for mobile devices (TA = -25°C to +85°C)
Asynchronous Fast SRAM
SRAM is perfect for network equipment and measuring instruments such as IC tester as it has the fast access time of asynchronous.
Features
- 16Mbytes high-capacity product also available
- Various word configurations (4 Mbits: x1, x4, x8, x16)
- 8 ns high-speed access (4 Mbits)
DDR II SRAM
This enables data to be read or written twice every clock as it is a DDR (Double Data Rate) type SRAM. A much higher transfer rate is achieved by this product than conventional synchronous SRAM products. The area which carries SRAM is being reduced by the adoption of BGA package. Applications such as those used in the look-up tables of network switches and routers are ideal applications for DDRII SRAM.
QDR™II SRAM
An SRAM that is equipped with a data input pin and a data output pin separately is called QDR. A standard SRAM has a common pin for data input and output. Enabling ultra-high-speed operation through simultaneous data reading and writing, QDR runs data input and output at double data rate (DDR). When reading and writing the data alternately, it gives the highest performance. For use in next-generation high-performance network switches, routers, etc., this memory is ideal.
Mobile Specified RAM
To enable a capacity much higher than could be achieved with conventional SRAM, this memory is functionally compatible with low power SRAM but employs DRAM memory cells. This memory is particularly well suited to mobile applications because of high capacity, low power, high speed and wide operating temperature range.
Features
- Functionally compatible with low power SRAM
- Low current consumption (standby current in 64 Mbits product: 100 µA or less)
- Page read and data hold capacity select functions provided
- Ideal for SiP of Stacked MCP and logic IC
Mask ROM
Mask ROM is widely used in applications requiring the storage of fixed data that is not written on the system as it is more inexpensive than flash memory, EPROM and other non-volatile memories. In the devices such as calculators, PDAs, and electronic dictionaries, this product is ideal for fixed data storage.
A lineup of compatible packages with flash memory (48-pin TSOP(I) 12x20mm and 48-pin tape FBGA 8x6mm) besides a conventional package (48-pin TSOP(I) 12x18mm) is also offered.
Features
- Wide range of memory capacities: From 16 Mbits to 128 Mbits
- Product with conventional pin layout and pin-compatible product exchangeable with flash memory provided
- Products featuring 4-/8-word page operation also available
Stacked MCP
Stacked MCP combines flash memory, mobile specified RAM, low power SRAM and other Memory IC chips in a single package. This makes any memory combination is possible.
Features
- Up to 4 chips in one package with a package height of no more than 1.4 mm
- Packages with RAM-only combinations (mobile specified RAM and low power SRAM) also available
- Products development by any memory combinations can allow customization
Line Buffer
This is a FIFO (first-in, first-out) type memory and is ideal for line delay and time axis conversion in equipment such as facsimiles and digital copiers.
Features
Line buffer has different cycles enabling independent and asynchronous writing and reading.
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